Design and Implementation of low power Floating Point Multiplier

Design and Implementation of Low power High Speed Floating Point Adder and Multiplier

Design and Implementation of Efficient Adder based Floating Point Multiplier

In this paper a new idea is proposed to increase the speed of single precision floating point multiplier. In floating point multiplication adders are used at different places. The implementation uses efficient adders for compressing the partial products, adding the exponent and at final stage. First different adders are compared based on the delay and then multiplier is designed using the best ...

Low Power Floating-Point Multiplier Based On Vedic Mathematics

Fast Fourier transform (FFT) coprocessor, having significant impact on the performance of communication systems, hasbeen a hot topic of research for many years. The FFT function consists of consecutive multiply add operations over complex numbers, dubbed as butterfly units. Applying floating-point (FP) arithmetic to FFT architectures, specifically butterfly units, has become more popular recent...

FPGA Implementation On Reversible Floating Point Multiplier

Field programmable gate arrays (FPGA) are increasingly being used in the high performance and scientific computing community to implement floating-point based system. The reversible single precision floating point multiplier (RSPFPM) requires the design of reversible integer multiplier (2424) based on operand decomposition approach. Reversible logic is used to reduce the power dissipation than...

Design and Implementation of Low Power Floating Point Unit Using Reconfigurable Data Path: a Survey

Floating point arithmetic is widely used in many areas especially scientific computation and signal processing. The main objective of this paper is to reduce the power consumption and to increase the speed of execution and the implementation of floating point multiplier using sequential processing on the reconfigurable hardwareFloating Point (FP) addition, subtraction and multiplication are wid...